MC9S12H128

Name: MC9S12H128
Brand: Freescale
Rating: 4.5 (10 reviews)
Author: Lisleapex

Device User Guide

3,025 有效庫存

MC9S12H128

有效庫存3,025

Device User Guide

製造商零件號 # : MC9S12H128
包裝/封裝: 112-QFP
製造商: Freescale
產品分類 : Single FETs, MOSFETs

品質保證

從我們的供應鍊網路採購的所有零件都經過嚴格的進貨檢驗流程。這種細緻的檢查可確保客戶收到的零件是正品並符合要求的標準。此外，我們還保存這些檢查的詳細記錄，以確保整個供應鏈的透明度和可追溯性。

認證

我們已成功獲得各項認證標準，並建立了自己的專業檢測實驗室。這確保了我們向客戶提供的每件產品都符合最高的品質標準。我們遵守嚴格的測試協議，以保持我們產品的一致性和準確性。為了確保我們的產品是原裝正品，我們還與信譽良好的第三方檢測機構合作進行嚴格的品質測試。我們對品質的承諾延伸到滿足行業、法律、監管和 ISO 9001:2015 的要求。

運輸與付款

關於運送

我們通常會在幾個工作日內通過可靠的運輸公司（例如 FedEx、SF、UPS 或 DHL）運送訂單。我們還支持其他運輸方式。如果您想詢問具體的運輸細節或費用，請隨時與我們聯繫。

關於付款

我們接受多種支付方式，包括VISA、MasterCard、銀聯、西聯、PayPal等渠道。

如果您有特定的付款方式或想詢問費率和其他詳細信息，請隨時與我們聯繫。

電匯

Paypal

信用卡

西聯匯款

速匯金

服務與包裝

About After Sales Service

All Parts Extended Quality Guarantee

自發貨之日起 90 天內發起申請。

與我們的工作人員確認退貨或換貨。

保持貨物收到時的原始狀態。

最後請注意，退貨或換貨的資格取決於對退貨商品實際狀況的評估。在完成退貨或換貨流程之前，我們將評估收到的貨物。如果您對退貨或換貨有任何疑問或需要進一步幫助，請隨時通過以下方式聯絡我們： [email protected]

關於包裝

在包裝方面，我們的產品均精心包裝在防靜電袋中，以提供ESD防靜電保護。外包裝堅固耐用且閉合牢固。我們支持各種包裝方法，例如捲帶式、切帶式、管式或託盤式。

例子

捲帶式

剪膠帶

管或託盤

MC9S12H128 數據表

目前的價格方案正在編制中。請聯絡我們的客戶服務團隊獲取最新的價格資訊。感謝您的理解和支援!

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快速報價

請提交詢價 MC9S12H128 或發送電子郵件給我們： Email: [email protected], 我們將在 12 小時內與您聯繫。

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MC9S12H128 詳細說明

OverviewThe MC9S12H256 microcontroller unit (MCU) is a 16-bit device composed of standard on-chipperipherals including a 16-bit central processing unit (HCS12 CPU), 256K bytes of Flash EEPROM, 12K bytes of RAM, 4K bytes of EEPROM, two asynchronous serial communications interfaces (SCI), a serial peripheral interface (SPI), an IIC-bus interface (IIC), an 8-channel 16-bit timer (TIM), a 16-channel, 10-bit analog-to-digital converter (ATD), a six-channel pulse width modulator (PWM), and two CAN 2.0 A, B software compatible modules (MSCAN).Features• HCS12 Core– 16-bit HCS12 CPU i. Upward compatible with M68HC11 instruction set ii. Interrupt stacking and programmer’s model identical to M68HC11 iii.20-bit ALU iv. Instruction queue v. Enhanced indexed addressing– MEBI (Multiplexed External Bus Interface)– MMC (Module Mapping Control)– INT (Interrupt control)– BKP (Breakpoints)– BDM (Background Debug Mode)• CRG (low current oscillator, PLL, reset, clocks, COP watchdog, real time interrupt, clock monitor)• 8-bit and 4-bit ports with interrupt functionality– Digital filtering– Programmable rising or falling edge trigger• Memory– 256K Flash EEPROM– 4K byte EEPROM– 12K byte RAM• Analog-to-Digital Converter– 16 channels, 10-bit resolution– External conversion trigger capability• Two 1M bit per second, CAN 2.0 A, B software compatible modules– Five receive and three transmit buffers– Flexible identifier filter programmable as 2 x 32 bit, 4 x 16 bit or 8x8bit– Four separate interrupt channels for Rx, Tx, error and wake-up– Low-pass filter wake-up function– Loop-back for self test operation• Timer– 16-bit main counter with 7-bit prescaler– 8 programmable input capture or output compare channels– Two 8-bit or one 16-bit pulse accumulators• 6 PWM channels– Programmable period and duty cycle– 8-bit 6-channel or 16-bit 3-channel– Separate control for each pulse width and duty cycle– Center-aligned or left-aligned outputs– Programmable clock select logic with a wide range of frequencies– Fast emergency shutdown input• Serial interfaces– Two asynchronous Serial Communications Interfaces (SCI)– Synchronous Serial Peripheral Interface (SPI)– Inter-Integrated Circuit interface (IIC)• Liquid Crystal Display driver with variable input voltage– Configurable for up to 32 frontplanes and 4 backplanes or general purpose input or output– 5 modes of operation allow for different display sizes to meet application requirements– Unused frontplane and backplane pins can be used as general purpose I/O• 24 high current drivers suited for PWM motor control– Each PWM channel switchable between two drivers in an H-bridge configuration– Left, right and center aligned outputs– Support for sine and cosine drive– Dithering– Output slew rate control• 144-Pin or 112-Pin LQFP package– I/O lines with 5V input and drive capability– 5V A/D converter inputs– Operation at 32MHz equivalent to 16MHz Bus Speed– Development support– Single-wire background debug™ mode (BDM)– On-chip hardware breakpoints

主要特徵

HCS12 Core
– 16-bit HCS12 CPU
i. Upward compatible with M68HC11 instruction set
ii. Interrupt stacking and programmer’s model identical to M68HC11
iii.20-bit ALU
iv. Instruction queue
v. Enhanced indexed addressing
– MEBI (Multiplexed External Bus Interface)
– MMC (Module Mapping Control)
– INT (Interrupt control)
– BKP (Breakpoints)
– BDM (Background Debug Mode)
CRG (low current oscillator, PLL, reset, clocks, COP watchdog, real time interrupt, clock monitor)
8-bit and 4-bit ports with interrupt functionality
– Digital filtering
– Programmable rising or falling edge trigger
Memory
– 128K, 256K Flash EEPROM
– 2K, 4K byte EEPROM
– 6K, 12K byte RAM
Analog-to-Digital Converter
– 8, 16 channels, 10-bit resolution
– External conversion trigger capability
Two 1M bit per second, CAN 2.0 A, B software compatible modules
– Five receive and three transmit buffers
– Flexible identifier filter programmable as 2 x 32 bit, 4 x 16 bit or 8x8bit
– Four separate interrupt channels for Rx, Tx, error and wake-up
– Low-pass filter wake-up function
– Loop-back for self test operation
Timer
– 16-bit main counter with 7-bit prescaler
– 8 programmable input capture or output compare channels
– Two 8-bit or one 16-bit pulse accumulators
2, 6 PWM channels
– Programmable period and duty cycle
– 8-bit 2, 6-channel or 16-bit 1, 3-channel
– Separate control for each pulse width and duty cycle
– Center-aligned or left-aligned outputs
– Programmable clock select logic with a wide range of frequencies
– Fast emergency shutdown input
Serial interfaces
– Two asynchronous Serial Communications Interfaces (SCI)
– Synchronous Serial Peripheral Interface (SPI)
– Inter-Integrated Circuit interface (IIC)
Liquid Crystal Display driver with variable input voltage
– Configurable for up to 32 frontplanes and 4 backplanes or general purpose input or output
– 5 modes of operation allow for different display sizes to meet application requirements
– Unused frontplane and backplane pins can be used as general purpose I/O
16, 24 high current drivers suited for PWM motor control
– Each PWM channel switchable between two drivers in an H-bridge configuration
– Left, right and center aligned outputs
– Support for sine and cosine drive
– Dithering
– Output slew rate control
144-Pin or 112-Pin LQFP package
– I/O lines with 5V input and drive capability
– 5V A/D converter inputs
– Operation at 32MHz equivalent to 16MHz Bus Speed
– Development support
– Single-wire background debug™ mode (BDM)
– On-chip hardware breakpoints